FPGA implementation of the portable automatic testing system for digital circuits

Architecture for the BIST Boundary Scan

Design and Implementation of an Advanced Radar Signal Processor with Waveform Generator and BIST Unit on a Single FPGA Chip

NEW AUTOMATIC TESTING ARCHITECTURE FOR INTEGRATED CIRCUITS

Safety Critical FPGA Design

EXPERMENTAL ANALYSIS OF THE BOUNDARY SCAN AS DESIGN FOR TESTING TECHNIQUE

Design for Testability of Circuits and Systems; An overview

FPGA Design and Implementation for Pseudorandom Number Generator based square root (SR-PRNG)

Assertion based HDL-models testing for SoC components

FPGA implementation of OFDM physical layer