FPGA Design and Implementation for Pseudorandom Number Generator based square root (SR-PRNG)
Last updated: 30 Dec 2024
10.21608/jisse.2023.187871.1068
PRNG, FPGA, MATLAB HDL CODER
Ghada
Elsayed
Electrical Department, Faculty of Engineering, MTI University
ghada.farouk@eng.mti.edu.eg
0000000238025620
Somaya
Kayed
Ismail
Department head, Obour Higher Institute for Engineering and Technology
dr.somayaismail@ohie.edu.eg
Cairo
0000-0003-2301-8433
5
1
38083
2023-03-01
2023-01-16
2023-03-01
8
14
2636-4425
2682-3438
https://jisse.journals.ekb.eg/article_295181.html
https://jisse.journals.ekb.eg/service?article_code=295181
295,181
Original Article
908
Journal
Journal of International Society for Science and Engineering
https://jisse.journals.ekb.eg/
FPGA Design and Implementation for Pseudorandom Number Generator based square root (SR-PRNG)
Details
Type
Article
Created At
30 Dec 2024