Abstract:
The authors in paper [1] are presented the new automatic test equipment (ATE) for
digital integrated circuits based on the signature analysis. This work introduced a
complete framework for the testing of the printed circuit boards (PCBs) of the digital
integrated circuits. In this paper, the Field Programmable Gate Array (FPGA)
implementation of this new ATE is presented. The timing simulation and then design
download are presented on the Spartan Xilinx chip (X2S400EFT256-7). In this paper,
the concept of the portable ATE is presented that reduces the complexity of the
traditional ATE. This compacted testing system approach is designed to apply the test
pattern to the circuit under test (CUT) and to compact the response of the CUT by
signature analyzer. The timing controller and the parallel port of the personal computer
(PC) generate all required signals to control all steps of the test cycle for proper
operation.