EFFICIENT GENERATION OF SHORTEST ADDITION-MULTIPLICATION CHAINS

SPEEDING UP MULTI- EXPONENTIATION ALGORITHM ON A MULTICORE SYSTEM

A HIGH-LEVEL SYNTHESIS METHODOLOGY FOR DEDICATED DSP ARCHITECTURES

An Area Efficient Approach: Comparative Analysis of Multiplier Circuits

A NEW TRIPLE OPTIMALITY CRITERION CDKL

Development an Analytical Performance Models for Matrix Multiplication on Distributing Systems

A SCALABLE PARALLEL ALGORITHM FOR TURNPIKE PROBLEM

HYBRID OPTIMIZATION OF STAR GRAIN PERFORMANCE PREDICTION TOOL

An efficient FDTD algorithm based on FPGA

HIGH-SPEED, AREA-EFFICIENT FPGA-BASED FLOATING-POINT ARITHMETIC MODULES