Performance Study of the Modified Fast Serial Parallel Multiplier with RECO Technique.

FPGA versus ASIC Implementation of Radix-8 Scalable Montgomery Modular Multiplier.

FPGA versus ASIC Implementation of Radix-4 Scalable Montgomery Modular Multiplier.

Design of Delay-Power Efficient Carry Select Adder using 3-T XOR Gate

EFFICIENT GENERATION OF SHORTEST ADDITION-MULTIPLICATION CHAINS

A HIGH-LEVEL SYNTHESIS METHODOLOGY FOR DEDICATED DSP ARCHITECTURES

Standard VLSI Cells For Fuzzy Logic Controller Implementation

HIGH-SPEED, AREA-EFFICIENT FPGA-BASED FLOATING-POINT ARITHMETIC MODULES

A Comparative Study between MATLAB HDL Coder and VHDL for FPGAs Design and implementation

Efficient Implementation of Lightweight MDS Matrix on FPGA