Design and Simulation of 140 dB Dynamic Range and 20 uVrms Readout Noise CMOS Image Sensor

Low power, Low Voltage and High Gain UWB Low-Noise Amplifier in the 0.13 μm CMOS technology

Design of a low noise single-ended sensor interface amplifier for bio-potential applications

A Fully Differential Chopper Circuit in 130nm CMOS for Noise Minimization in Sensor Applications

A Low-Power Low-Noise Neural recording Bioamplifier

Design and simulation of 140 dB dynamic range and 20 uVrms readout noise COMS image sensor

Design a Broad-band High flatness Gain Low Noise Amplifier for radar Applications

A Wideband Variable Gain Amplifier using 0.13m CMOS Technology

design and simulation of 1.2 mW power consumption ultra-wideband low noise amplifier for ultra-wideband wireless communications

Design of Low Voltage 1st Order 3-Bit Quantizer SR ΔΣ Modulator Using SR Op-Amp