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23498

Design of Low Voltage 1st Order 3-Bit Quantizer SR ΔΣ Modulator Using SR Op-Amp

Article

Last updated: 24 Dec 2024

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Abstract

This paper presents a low power (LP) switched resistor (SR) ΔΣ modulator based on 3-bit dynamic quantizer. The proposed design offers lower noise compared to switched capacitor (SC) techniques due to reduction of the number of switches and capacitors. The modulator is designed in a 0.18 μm CMOS technology. The total power consumption is 17.4 mW , and signal to noise ratio (SNR)= 65.8 dB, using, over sampling ratio (OSR) = 64 and 3 V power supply.

DOI

10.21608/asat.2009.23498

Keywords

switched resistor, sigma delta modulator, analog to digital

Authors

First Name

S.

Last Name

Kishk

MiddleName

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Affiliation

Dr., Electronics & comm. Eng. Dept., Faculty of Eng., Mansoura university.

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First Name

M.

Last Name

Abo-Elsoud

MiddleName

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Affiliation

Prof., Electronics & comm. Eng. Dept., Faculty of Eng., Mansoura university.

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Orcid

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First Name

A.

Last Name

Osman

MiddleName

-

Affiliation

Researcher assistant, Electronics & comm. Eng. Dept., Faculty of Eng., Mansoura university.

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-

City

-

Orcid

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Volume

13

Article Issue

AEROSPACE SCIENCES & AVIATION TECHNOLOGY, ASAT- 13, May 26 – 28, 2009

Related Issue

4377

Issue Date

2009-05-01

Receive Date

2019-01-03

Publish Date

2009-05-01

Page Start

1

Page End

9

Print ISSN

2090-0678

Online ISSN

2636-364X

Link

https://asat.journals.ekb.eg/article_23498.html

Detail API

https://asat.journals.ekb.eg/service?article_code=23498

Order

21

Type

Original Article

Type Code

737

Publication Type

Journal

Publication Title

International Conference on Aerospace Sciences and Aviation Technology

Publication Link

https://asat.journals.ekb.eg/

MainTitle

Design of Low Voltage 1st Order 3-Bit Quantizer SR ΔΣ Modulator Using SR Op-Amp

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Article

Created At

22 Jan 2023