Abstract—A hybrid class-F-class-E power amplifier (PA) with proposed inductor-capacitor (LC) interstage was designed and simulated using130-nm CMOS technology. The driver stage (class-F) is employed to operate as a switch to improve the efficiency of the designed UWB-PA. The proposed inductor-capacitor (LC) interstage is used to improve the linearity of the proposed PA. The class-E PA is used as the main stage to enhance gain and output power. The proposed circuit operates in the ultra-wideband band from 3.1 GHz to 10.6 GHz. The designed circuit achieves a 26.4-dBm output power, a power added efficiency (PAE) of 54%, an output referred IP3 (OIP3) of greater than 33-dBm and a 27-dB maximum gain. Moreover, the circuit realized ±44 ps group delay variation. The proposed circuit satisfies the need for class-E amplifiers with fast input exchange signals, such amplifiers are required to realize zero voltage and zero derivative switching (ZVDS) without adding a large dissipation, which is achieved via the use of a class-F PA as the driver stage. This circuit provides high PAE and good linearity.